1. Field of the Invention
The present invention relates to a frequency control system for extracting a clock signal from a high bit rate digital signal or for synthesizing a frequency. The system comprises a circuit loop including a voltage-controlled oscillator (VCO) slaved to an incoming signal of unstable frequency.
2. Description of the Prior Art
The frequency control of a VCO is used in a receiver in order to extract from a digital data signal an original clock signal produced by a transmitter which transmitted the data signal. Frequency synthesis using a VCO is used in radio transmitters and receivers when it is necessary to generate precise frequencies for selecting a channel. In these two applications, the main technical problem is to extract the clock signal contained in the received digital data signal, which is affected by noise, i.e. which contains jitter, and to synthesize a precise frequency based on an unstable reference frequency.
The invention has applications in the field of digital transmissions at high bit rates, up to several hundred Mbit/s, for recovering the clock signal needed to process the received data, and in the field of radio equipments, for synthesizing high frequencies, typically up to a few GHz.
In the two fields of applications previously cited, it is standard practice to use a phase-locked loop (PLL) which comprises a VCO, a frequency divider which can be programmable and which is connected to the output of the oscillator to provide a divided frequency signal, and a phase comparator which delivers an error signal based on comparing the phases of the divided frequency signal and a reference signal. The amplified and then filtered error signal controls the oscillator VCO.
A first difficulty encountered in the prior art, when the required frequency is high, is that of providing a divide-by-N frequency divider which is needed to synthesize any frequency equal to k.N.Fr where k is a constant, N is a variable coefficient and Fr is the frequency of the reference signal. If N is an integer, frequencies multiple of the frequency Fr of the reference signal are generated by the oscillator VCO. However, it is routine practice not to limit N to integer values, which increases the complexity of the frequency divider included in the loop and leads to insurmountable technical implementation constraints at high frequencies.
A second difficulty results from the necessity to apply a very stable reference signal to the phase comparator; if this is not achieved, noise in the reference signal is multiplied by a factor k.N in the synthesized signal output by the oscillator.